1. Field of the Disclosure
This disclosure relates to a liquid crystal display (LCD) device and a manufacturing method thereof, and more particularly to an LCD device with a gate-in-panel structure and a manufacturing method thereof.
2. Description of the Related Art
As the community remarkably changes into an information society, flat display devices with superior features, such as light weight, small size, and low power drive, have been highlighted more and more. Among these flat display devices, the LCD devices have been actively applied to monitors of notebook and desktop computers, because of their superior definition, color scheme, and picture quality.
The LCD device generally includes two substrates configured to each include an electrode and disposed to allow the two electrodes to be opposite each other, and a liquid crystal material interposed between the two electrodes. Such an LCD device induces an electric field between the two electrodes using a voltage and forces liquid crystal molecules into the liquid crystal material to be realigned, thereby controlling light transmittance. As a result, the LCD device displays a variety of images.
Such an LCD device includes an LCD panel with a liquid crystal layer interposed between two substrates, a backlight unit disposed under the LCD panel, and a driver disposed by a side of the LCD panel and configured to drive the LCD panel. The backlight unit is used as a light source for emitting light to the LCD panel.
The driver is ordinarily embodied on a driving printed-circuit-board (PCB). The driving PCB can be divided into a gate driving PCB connected to gate lines on the LCD panel, and a data driving PCB connected to data lines of the LCD panel. Such gate and data driving PCBs are configured in the manner of a tape carrier package (TCP). Also, the gate and data driving PCBs are mounted on a gate pad portion, which is formed in an edge of the LCD panel and connected to the gate lines, and a data pad portion which is formed in another edge of the LCD panel perpendicular to the edge with the gate pad portion and connected to the data lines.
However, the driving PCB, which is divided into the gate and data driving PCBs and loaded on the gate and data pad portions, makes the size and weight of the LCD device to increase. To address this matter, the LCD device with a gate-in-panel (GIP) structure has been proposed which it allows not only one driving PCB to be loaded on one edge of the LCD panel but also the gate driving circuit to be directly formed on the LCD panel.
FIG. 1 is a circuitry diagram schematically showing an array substrate included in an LCD device with a GIP structure according to the related art. As shown in FIG. 1, the array substrate of the LCD device with the GIP structure is divided into an active area AA used to display images and non-active configured to surround the active area AA.
The active area AA includes gate and data lines GL and DL configured to cross each other and to define pixel regions P, thin film transistors TR each connected to the respective gate and data lines GL and DL, and pixel electrodes PXL connected to the respective thin film transistors TR. The thin film transistors TR are used as a switching element.
On the other hand, a part of the non-active area adjacent to a top edge of the active area AA includes a plurality of circuit film (not shown) divisionally loaded with a data driver (not shown). Another part of the non-active area adjacent to one of both side edges of the active area AA includes a gate driving circuit GCA and a signal input portion SIA positioned adjacent to an edge of the gate driving circuit GCA.
The gate driving circuit GCA is configured with a plurality of circuit blocks CB1 and CB2 each including a plurality of switching elements, capacitors, and so on. Each of the circuit blocks CB1 and CB2 is connected to the gate lines formed on the active area AA and first, second, and fourth signal lines CL1, CL2, and CL4 formed within the signal input portion SIA. Also, the circuit blocks CB1 and CB2 are serially connected to a third signal line CL3 within the signal input portion SIA.
The first signal line CL1 is used for transferring a high level driving voltage VDD. The second signal line CL2 is used to transferring a low level driving voltage VSS. The third signal line CL3 is used for transferring an enable signal EN. The fourth signal line CL4 is used for transferring a clock signal CLK.
During a process of manufacturing the signal lines CL1˜CL4, gate lines GL, data lines DL, thin film transistors, or others, static electricity can be induced. The static electricity can cause a malfunction of the LCD panel. Due to this, the signal lines can be broken, and furthermore the circuit elements within the active area AA of the LCD device can be damaged.
Particularly, due to static electricity, an error is caused in the start pulse, which is used to start the operation of the gate driving circuit GCA, on the start pulse line Vst connected to only the first circuit block CB1 among the plurality of circuit blocks CB1 and CB2. In this case, the residual circuit blocks CB2 connected to the first circuit block CB1 malfunction, and furthermore the circuit elements within the active area AA can be damaged.